Although both FPGA and CPLD are programmable ASIC devices, there are many common features, but due to the differences in the structure of CPLD and FPGA, they have their own characteristics:
1.CPLD is more suitable for completing various algorithms and combinational logic, and FPGA is more suitable for completing timing logic. In other words, FPGAs are more suitable for the rich structure of flip-flops, while CPLDs are more suitable for structures with limited triggers and rich product terms.
2. The continuous routing structure of CPLD determines that its timing delay is uniform and predictable, and the segmented routing structure of FPGA determines the unpredictability of its delay.
3.FPGAs have more flexibility than CPLDs in programming. The CPLD is programmed by modifying the logic function with a fixed interconnect circuit. The FPGA is primarily programmed by changing the wiring of the internal wiring; the FPGA can be programmed under the logic gate, and the CPLD is programmed under the logic block.
4.FPGA is more integrated than CPLD, with more complex wiring structure and logic implementation.
5.CPLD is more convenient than FPGA. The programming of CPLD adopts E2PROM or FASTFLASH technology, which does not require an external memory chip and is easy to use. The programming information of the FPGA needs to be stored in the external memory, and the usage method is complicated.
6.The CPLD is faster than the FPGA and has greater time predictability. This is because FPGAs are gate-level programming, and distributed interconnections between CLBs, while CPLDs are logic block-level programming, and the interconnections between their logic blocks are lumped.
7. In the programming mode, CPLD is mainly based on E2PROM or FLASH memory programming, the number of programming can reach 10,000 times, the advantage is that the programming information is not lost when the system is powered off. CPLD can be divided into two types: programming on the programmer and in system programming. Most of the FPGA is based on SRAM programming. The programming information is lost when the system is powered off. Each time the power is turned on, the programming data needs to be rewritten into the SRAM from outside the device. The advantage is that it can be programmed any number of times and can be programmed quickly at work for dynamic configuration at the board and system level.
8.CPLD has good confidentiality and FPGA has poor confidentiality.
9. In general, the power consumption of CPLD is larger than that of FPGA, and the higher the integration, the more obvious.
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